Скачать с ютуб FPGA/SoC Board Bring-Up - QSPI (Zynq Part 3) - Phil's Lab #98 в хорошем качестве

FPGA/SoC Board Bring-Up - QSPI (Zynq Part 3) - Phil's Lab #98

How to configure the QSPI Flash memory interface and create first-stage bootloader (FSBL) to automatically program a Xilinx/AMD Zynq system-on-chip on custom hardware. Schematic and hardware walkthrough, Vivado and Vitis configuration, and test. [SUPPORT] Free trial of Altium Designer: https://www.altium.com/yt/philslab Patreon:   / phils94   Mixed-signal hardware design course: https://phils-lab-shop.fedevel.education Advanced Hardware Design Course Survey: https://forms.gle/X4jwvtZeJ1jTXh7r9 [GIT] https://github.com/pms67 [LINKS] Instagram:   / philslabyt   FSBL: https://xilinx-wiki.atlassian.net/wik... https://xilinx.github.io/Embedded-Des... [TIMESTAMPS] 00:00 Introduction 00:51 Previous Videos 01:13 Altium Designer Free Trial 01:30 Schematic 02:45 Memory Choice (UG908) 03:53 PCB & Bootmode Pins 04:58 First-Stage Boot Loader (FSBL) Overview 05:39 Vivado Set-Up 06:57 Vitis FSBL & Boot Image 07:49 Vitis Hello World Application & Boot Image 09:14 Hardware Connection 09:53 Program Flash 11:44 Bootmode Selection (QSPI) 12:17 UART Hello World Test 12:26 Summary & What's Next 13:08 Outro