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Clocking Circuits Session1

In this session, I a) Discuss the use cases of a Phase Locked Loop (PLL) b) Phase Noise/ Jitter of Phase Locked Loop c) Principle of Phase Locking to TCXO/OCXO crystal oscillators d) PLL sub circuits- VCO, Prescalar, Phase Frequency Detector, Charge Pump, Loop Filter, Sigma Delta Modulator. e) Discuss relationship between loop stability and N from point of view of DT approximation of CT system f) Discuss the need for fractional N compared to Fixed N and means to generate it g) Problems of Dual Modulus Prescalar and its solution using Multi-Modulus Prescalar h) Noise shaping using Sigma Delta Modulator j) Discuss operation of Sigma Delta Modulator k) Discuss order of Loop Filter and design l) Role of Dethering LSB of Sigma Delta Modulator input and it circuitry. m) Demonstrate a Multi-modulus Fractional N PLL design in 130 nm CMOS process with all the above discussed block.